[discussion_vu] Re: ``**``(*_*)...KOI to kre na CS501 ka Quiz...(*_*)``**``

pehlay solve thiss...chaloo shabssh..

What is the instruction length of the SRC processor?

 

       ► 8 bits

 

       ► 16 bits

 

       ► 32 bits

 

       ► 64 bits

 

   

Question No: 2    ( Marks: 1 )    - Please choose one

 Which one of the following is the memory organization of FALCON-E processor?

 

       ► 2⁸ * 8 bits

 

       ► 2¹⁶ * 8 bits

 

       ► 2³² * 8 bits

 

       ► 2⁶⁴ * 8 bits

 

   

Question No: 3    ( Marks: 1 )    - Please choose one

 "If P = 1, then load the contents of register R1 into register R2".

This statement can be written in RTL as:

 

       ► R1 ¬ R2

 

       ► P: R1 ¬ R2

           

       ► P: R2 ¬ R1

           

       ► P: R2 ¬ R1,   P: R1 ¬ R2

 

   

Question No: 4    ( Marks: 1 )    - Please choose one

 The instruction ---------------will load the register R3 with the contents of the memory location M [PC+56] http://vustudents.ning.com

 

►Add R3, 56

►lar R3, 56

 

►ldr R3, 56

 

►str R3, 56

 

   

Question No: 5    ( Marks: 1 )    - Please choose one

 ----------are faster than cache memory http://vustudents.ning.com

       ► Accumulator register

 

       ► CPU registers

 

       ► I/O devices

 

       ► ROM

 

 

   

Question No: 6    ( Marks: 1 )    - Please choose one

 P:  R3 ¬ R5

MAR ¬ IR

These two are instructions written using RTL .If these two operations is to occur simultaneously then which symbol will we use to separate them so that it becomes a correct statement with the condition that two operations occur simultaneously?

 

       ► Arrow    ¬           

 

       ► Colon    :                   

 

       ► Comma  ,      

 

       ► Parentheses ()    

 

   

Question No: 7    ( Marks: 1 )    - Please choose one

 Prefetching can be considered a primitive form of-------------

►Pipelining http://vustudents.ning.com

 

►Multi-processing

 

►Self-execution

 

►Exception

 

   

Question No: 8    ( Marks: 1 )    - Please choose one

 The processor must have a way of saving information about its state or context so that it can be restored upon return from the ------------- http://vustudents.ning.com

►Exception

 

►Function

 

►Stack

 

►Thread

 

   

Question No: 9    ( Marks: 1 )    - Please choose one

 

Which one of the following circuit design levels is called the gate level?

 

       ► Logic Design Level

 

       ► Circuit Level

 

       ► Mask Level

 

       ► None of the given

 

   

Question No: 10    ( Marks: 1 )    - Please choose one

 __________ enable the input to the PC for receiving a value that is currently on the internal processor bus.

       ► LPC

       ► INC4

       ► LC

       ► Cout

   

Question No: 11    ( Marks: 1 )    - Please choose one

 ________ operation is required to change the processor's state to a known, defined value.

       ► Change

       ► Reset

       ► Update

       ► None of the given

   

Question No: 12    ( Marks: 1 )    - Please choose one

 There are _________ types of reset operations in SRC

       ► Two

       ► Three

       ► Four

       ► Five

   

Question No: 13    ( Marks: 1 )    - Please choose one

 _____________ controller controls the sequence of the flow of microinstructions.

       ► Multiplexer

       ► Microprogram

       ► ALU

       ► None of the given

   

Question No: 14    ( Marks: 1 )    - Please choose one

 FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC is __________ wide.

 

       ► 8-bits

       ► 24-bits

       ► 32-bits

       ► 64-bits

   

Question No: 15    ( Marks: 1 )    - Please choose one

 Which of the following statement(s) is/are correct about Reduced Instruction Set Computer (RISC) architectures.

 (i)        The typical RISC machine instruction set is small, and is usually a subject of a CISC instruction set.

(ii)        No arithmetic or logical instruction can refer to the memory directly.

(iii)       A comparatively large number of user registers are available.

(iv)       Instructions can be easily decoded through hard-wired control units.

 

       ► (i) and (iii) only

       ► (i), (iii) and (iv)

       ► (i), (ii) and (iii) only

 

       ► (i),(ii),(iii) and (iv)

 

   

Question No: 16    ( Marks: 1 )    - Please choose one

 Which one of the following register holds the instruction that is being executed?

 

 

 

 

 

 

 

       ► Accumulator

       ► Address Mask

       ► Instruction Register

       ► Program Counter

On Mon, May 9, 2011 at 4:24 PM, ~☆~SHINING STAR~☆~ <bc080402322@vu.edu.pk> wrote:

 

Plz koi to kre na pehlay or send kre Quiz...CS501..(Advance Coomputer Architecture)..??

 

Lecture 11-20..

 

Best Regards

ur well wisher,

($$)

--

"""Don't worry if people hate you because there are many others who love and care you in the earth. But be worried if ALLAH hates you because there is no other who loves and cares you in akhirat."""

 

 

"...SUBHANALLAHI WABI HAMDIHI...SUBHANALLAH IL AZEEM..."

~*~$H!N!NG $T@R~*~

 

--

"""Don't worry if people hate you because there are many others who love and care you in the earth. But be worried if ALLAH hates you because there is no other who loves and cares you in akhirat."""

 

 

"...SUBHANALLAHI WABI HAMDIHI...SUBHANALLAH IL AZEEM..."

~*~$H!N!NG $T@R~*~

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